A 0.7-V 100-dB 870-μW Digital Audio Σ∆ Modulator
نویسندگان
چکیده
A high-precision, low-voltage, low-power Σ∆ modulator has been designed using a delayed input feedforward architecture and a tracking multi-bit quantizer employing a single comparator. A 0.18-μm CMOS experimental prototype achieves 100 dB of dynamic range, 100-dB peak SNR and 95dB peak SNDR for a signal bandwidth of 25 kHz, while consuming only 870 μW of total power from a 0.7-V supply at a 5-MHz sampling rate.
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